JOB DESCRIPTION: -Implement DFT related designs including scan, JTAG, MBIST and Analog Macro test. -Develop and enhance DFT flow. -Work with design team for DFT integration. -Generate DFT related timing constraints and work with backend team to close DFT timing and power. -Work with test engineering team in patterns handoff and silicon bring up. QUALIFICATIONS: -BSEE/MSEE with 5+ years of industry experience in DFT. -Good understanding of scan/ATPG, JTAG, MBIST, boundary scan and other DFT techniques -Proficient with scripting, such as TCL, Python and Perl. -Good understanding of DFT timing and power. -Self-driven, good team work spirit and good communication skills.
云计算芯片公司,主要产品DDR
职位顾问