FPGA JD希望有下面的背景: 1) 有一定rtl coding能力,可以把asic的rtl porting到fpga需求的平台上。 2) 精通fpga的bitfile生成。 3) 有能力开发fpga测试使用的子板原理图(pcb的原理图) 4) 具有简单的c或者汇编的软件开发能力 5) 有一下外设的验证经验(例如:usb/Ethernet/hdmi/uart/i2C/sdio等) JOB DESCRIPTION: - Collect function points from design specification, generate/run/debug test cases on FPGA; - Build up and maintain FPGA test platform; - Porting ASIC to FPGA and generate bit file, including simulation, synthesis and P&R; - Help to develop driver for modules and silicon chip bring up, validation and debug. JOB QUALIFICATIONS: - Bachelor or Master in Electronics Engineering or related; - 3 years in hardware design/debug; - Familiar with Digital TV, Digital Video Broadcast system, Set Top Box, MPEG decoder, TV display and audio system; Familiar with C programming under Windows or embedded RTOS; Good in digital and analog circuit design and debug; - Familiar with lab equipments, such as oscilloscope, logic analyzer, spectrum analyzer, etc; Knowledge of PLD/FPGA design flow using Verilog/VHDL and EDA tools such as Xilinx ISE, Altera Quartus; - Experience in PCB schematic or layout is a plus; - English reading/writing, Windows office tools.
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